A ROM is a read-only memory widely used in the computer industry and particularly in video games. In general, at some step in the fabrication of the ROM, the ROM is tailored to a specific application, such as memory for a video game program, by coding. Coding involves disabling selected transistors in a memory array or preventing their formation during the fabrication of the array.
In the process of MOSFET ROM coding, one conventional approach has been to raise the threshold voltage of selected transisstors to render them non-functional at normal operating voltages. Typically, this was achieved by implanting species (boron for N-channel devices and phosphorus for P-channel devices) beneath the gate electrode so that the inversion of the channel necessary for current conduction occurred at a higher than normal gate operating voltage.
A second conventional approach has been to increase the oxide thickness under the gate electrode such that the threshold voltage of the device is raised due to a corresponding decrease in the gate oxide capacitance.
Both of the above approaches have been successfully practiced in the industry; however, with the demand for ROM devices increasing and with integrated circuits approaching smaller and smaller geometries, several drawbacks to the conventional approaches have arisen with ever-increasing adverse consequences.
The first approach of implanting a specie of dopant under the gate electrode requires a separate masking step and adds to the number of processing steps required. Further, with a fixed voltage approach for scaled-down geometries, the implant doses get larger and larger to achieve the same threshold value for the nonfunctional transistor. Also, while high energy implantation can be used at a relatively late stage of the fabrication in many types of devices, it requires costly equipment and is very sensitive to process variation.
The implanting approach can also be used to code CMOS devices using a separate masking step; however, a high energy implant dose is required and therefore, for the reasons stated above, the technique is not cost effective. Moreover, when used for coding CMOS devices, the technique must be done early in the fabrication process.
The coding approach using an increased oxide thickness under the gate electrode has its limitations also. The oxide thickness is the same as the field oxide thickness often used as an isolation between active devices. The resulting field threshold voltage being above the normal operating gate voltage of the device provides a high potential barrier preventing the operation of the non-functional transistor. However, as with the use of the implantation technique in CMOS devices, the use of isolation type oxides under the gate of a selected transistor to render the transistor non-functional with normal operating voltages must be done at an early stage of the device fabrication. Indeed, as a practical matter, the use of a gate disabling oxide must be done at the very beginning stage of the device fabrication.
Unless the coding of a ROM can be achieved at a late stage of the device fabrication, the maintenance of large inventories of substantially completed ROM devices is not possible and, as a consequence, undesirable long delivery times are required.